• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    PURPOSE: A CMOS image sensor is provided to be capable of widening dynamic range by connecting an external capacitor to a floating diffusion region. CONSTITUTION: A photodiode senses a light and generates optical carriers. A floating diffusion region stores the carrier generated in the photodiode. An external capacitor(Cext) is connected in series to the floating diffusion region. A transfer transistor(Tx) is connected between the photodiode and the floating diffusion region. A drive transistor(Dx) detects an electrical signal from the floating diffusion region. A reset transistor(Rx) is connected between the external capacitor and a power voltage terminal(Vdd).
    公开号:KR20030084492A
    申请号:KR1020020023239
    申请日:2002-04-27
    公开日:2003-11-01
    发明作者:이원호
    申请人:주식회사 하이닉스반도체；
    IPC主号:
    专利说明:

    CMOS image sensor with wide dynamic range
    [21] The present invention relates to a CMOS image sensor, and in particular, to reduce the capacitance of the floating diffusion region to expand the dynamic operating range of the CMOS image sensor.
    [22] In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. Among them, a charge coupled device (CCD) includes individual metal-oxide-silicon (MOS) capacitors. A device in which charge carriers are stored and transported in a capacitor while being in close proximity, and the Complementary MOS image sensor uses CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. A device employing a switching scheme that creates MOS transistors as many as pixels and sequentially detects outputs using the MOS transistors.
    [23] CCD (charge coupled device) has many disadvantages such as complicated driving method, high power consumption, high number of mask process steps, complicated process, and difficult to implement signal processing circuit in CCD chip. In order to overcome such drawbacks, the development of a CMOS image sensor using a sub-micron CMOS manufacturing technology has been studied in recent years. The CMOS image sensor forms an image by forming a photodiode and a MOS transistor in a unit pixel and sequentially detects signals in a switching method, and implements an image by using a CMOS manufacturing technology, which consumes less power and uses 30 to 40 masks as many as 20 masks. Compared to CCD process that requires two masks, the process is very simple, and it is possible to make various signal processing circuits and one chip, which is attracting attention as the next generation image sensor.
    [24] 1 is a circuit diagram showing a unit pixel composed of one photodiode (PD) and four NMOS transistors in a conventional CMOS image sensor, and includes a photodiode for generating photocharges by receiving light and a photodiode ( Transfer transistor Tx for transporting the photocharges collected from PD) to floating diffusion region FD, and reset for setting the potential of floating diffusion region to a desired value and discharging electric charges to reset floating diffusion region FD. A transistor Rx, a drive transistor Dx serving as a source follower buffer amplifier, and a select transistor Sx for addressing can be configured as a switching role. Outside the unit pixel, a load transistor is formed to read an output signal.
    [25] The photodiode is formed by a single or multiple junction of P type and N type impurity layers. The depletion layer formed on the photodiode not only converts incident light into electrons, but also serves as a capacitor for collecting changed charges. Do it.
    [26] When the CMOS image sensor having such a configuration is used in a mobile communication product or the like, it is an important issue to reduce the chip size. To this end, the minimum line width of the circuit is becoming more and more minutely from 0.35㎛ to 0.25㎛ or 0.18㎛, but in this case, securing the dynamic range of the CMOS image sensor should be solved most urgently.
    [27] In order to reduce the chip size, it is easiest to reduce the area of the photodiode. However, reducing the area of the photodiode reduces the dynamic range of the image sensor. Dynamic range refers to the width of the maximum output of the image sensor. The larger the dynamic range, the more accurate the image reproduction.
    [28] Therefore, there is a need for a method of reproducing an image without reducing the dynamic range in a miniaturized CMOS image sensor.
    [29] SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object thereof is to provide a CMOS image sensor and a method of manufacturing the same, which reduce the capacitance of the floating diffusion region and expand the dynamic operating range.
    [1] 1 is a unit pixel circuit diagram of a conventional CMOS image sensor;
    [2] 2 is a conceptual diagram illustrating a unit pixel of a CMOS image sensor according to an embodiment of the present invention;
    [3] 3A to 3F are cross-sectional views of a unit pixel of a CMOS image sensor according to an exemplary embodiment of the present invention.
    [4] 4 is a three-dimensional view of a floating diffusion region in which capacitors are connected in a unit pixel of a CMOS image sensor according to an embodiment of the present invention;
    [5] 5 is a circuit diagram illustrating a unit pixel of a CMOS image sensor according to an exemplary embodiment of the present invention.
    [6] * Description of the symbols for the main parts of the drawings *
    [7] 10: substrate
    [8] 11: field oxide film
    [9] 12: gate polysilicon
    [10] 13: n- impurity region
    [11] 14a: gate polysilicon of transfer transistor
    [12] 14b: Gate Polysilicon of Reset Transistor
    [13] 15 source / drain area
    [14] 16: p0 impurity region
    [15] 17: interlayer insulating film
    [16] 18: photoresist
    [17] 19: Tungsten Plug
    [18] 20: first metal wiring
    [19] 21: insulating film between metal wiring
    [20] 22: second metal wiring
    [30] The present invention for achieving the above object, a photodiode for generating a photocharge by sensing light from the outside; A floating diffusion region configured to receive and store charge generated from the photodiode; A capacitor connected in series with the floating diffusion region; A first transistor connected between the photodiode and the floating diffusion region to transfer charges generated from the photodiode to the floating diffusion region; A second transistor having one side connected to a power supply voltage and a gate connected to the capacitor to detect an electrical signal from the floating diffusion region; And a third transistor connected between a power supply voltage terminal and the capacitor to reset the photodiode. And a fourth transistor having one side connected to the other side of the third transistor.
    [31] The present invention reduces the capacitance of the floating diffusion region by forming an external capacitor in contact with the floating diffusion region. More specifically, a capacitor formed by using the gate polysilicon of the reset transistor, the first metal wiring, and the second metal wiring is provided. By forming in contact with the floating diffusion region, the capacitance of the floating diffusion region is reduced to increase the dynamic range of the image sensor.
    [32] When the present invention is applied to the CMOS image sensor, a larger dynamic range can be realized in the same photodiode area, which can greatly contribute to miniaturization of the CMOS image sensor.
    [33] Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention.
    [34] Since the maximum output of the image sensor is directly proportional to the number of electrons that can be taken out of the photodiode, the electron acceptability of the photodiode, ie, the capacitance, can increase the dynamic range.
    [35] There may be various ways to increase the dynamic range in the CMOS image sensor. First, as described above, there is a method of increasing the capacitance of the photodiode. That is, the capacity of the photodiode is increased by increasing the area of the photodiode.
    [36] Next, there is a method of reducing the capacitance of the floating diffusion region. The photocharge generated in the photodiode is transferred to the floating diffusion region and used to reproduce the image. In this case, the smaller the capacitance of the floating diffusion region is, the larger the change in voltage is for the same amount of charge.
    [37] ΔV = ΔQ / C FD where C FD is the capacitance of the floating diffusion region.
    [38] That is, as shown in Equation 1, the smaller the capacitance is for the same charge amount change, the larger the voltage change range. When the CMOS image sensor is miniaturized and the size of the photodiode is reduced, the amount of photocharge generated in the photodiode is inevitably reduced.
    [39] However, if the capacitance of the floating diffusion region is reduced as shown in Equation 1, the image can be reproduced by using the reduced photocharge without reducing the dynamic range.
    [40] The factor influencing the capacitance of the floating diffusion region is first the area of the floating diffusion region. If the area is reduced, the capacitance of the floating diffusion area can be reduced.
    [41] Alternatively, there may be a method of reducing the overlap capacitance in the floating diffusion region or reducing the effective oxide thickness (Tox) of the transfer transistor. If this method is used to reduce the capacitance of the floating diffusion region, complex process control may be required. Will be needed.
    [42] Therefore, in one embodiment of the present invention, the capacitance of the floating diffusion region is reduced by connecting an external capacitor to the floating diffusion region in series using an existing process.
    [43] FIG. 2 is a conceptual diagram illustrating a unit pixel of a CMOS image sensor according to an exemplary embodiment of the present invention, in which an external capacitor C EXT is connected to a floating diffusion region FD. In FIG. 2, C FD denotes a capacitance of a floating diffusion region, and C PD denotes a capacitance of a photodiode.
    [44] The present invention uses the principle that when the capacitors are connected in series, the total capacitance is reduced than the respective capacitances, and the capacitance of the floating diffusion region is reduced by forming an external capacitor connected in series with the floating diffusion region.
    [45] In addition, in one embodiment of the present invention, the capacitor is formed by using the gate polysilicon of the first metal wiring, the second metal wiring, and the reset transistor, thereby simply implementing the capacitor without an additional process.
    [46] 3A to 3F are process cross-sectional views illustrating a manufacturing process of a unit pixel according to an embodiment of the present invention. Referring to this, an embodiment of the present invention will be described. First, as shown in FIG. 3A, a predetermined process is completed. The field oxide film 11 is formed on the substrate 10 and the gate polysilicon 12 is formed. Next, a deep n− impurity region 13 constituting the photodiode is formed on one side of the gate polysilicon.
    [47] 3B, spacers are formed on the gate side of the transistor, such as the gate 14a of the transfer transistor and the gate 14b of the reset transistor, and the source / drain regions 15 and p0 are formed using a mask process. An impurity region 16 is formed to complete the photodiode and the transistor. The source / drain region 15 shown in FIG. 3B is an ion implantation region formed between the transfer transistor 14a and the reset transistor 14b and corresponds to the floating diffusion region FD.
    [48] Next, as shown in FIG. 3C, a contact forming process for serially connecting the floating diffusion region and the external capacitor is performed. That is, after forming an interlayer insulating film 17 to which a TEOS (Tetra Ethyl Ortho Silicate) oxide film and a BPSG (Boron Phospho Silicate Glass) film are applied on a substrate including a transistor, a mask process and an etching process using a photoresist 18 are performed. Next, a predetermined portion of the interlayer insulating layer 17 is etched to form a contact hole exposing the surface of the floating diffusion region 15. Subsequent processes remove the photoresist used in the mask process.
    [49] Next, as shown in FIG. 3D, a contact plug for electrical connection between the floating diffusion region 15 and the first metal wiring 20 is formed, and the contact hole is filled with tungsten. The etch back process or chemical mechanical polishing applied to form the tungsten plug is a conventional process and will not be described in detail.
    [50] Next, the first metal wiring 20 is formed on the interlayer insulating film 17 including the tungsten plug. An adhesive layer may be generally applied to the lower portion of the first metal wire.
    [51] The gate polysilicon 14b, the interlayer insulating film 17, and the first metal wiring 20 of the reset transistor shown in Fig. 3D form one capacitor. In other words, the gate polysilicon 14b and the first metal wiring 20 of the reset transistor function as electrodes of the capacitor, and the interlayer insulating film 17 serves as a dielectric.
    [52] In the conventional unit pixel manufacturing process, the gate polysilicon 14a and the first metal wiring 20 of the reset transistor were used, but this was only to serve as an electrical wiring, but not to serve as a capacitor.
    [53] In an embodiment of the present invention, the layout of the first metal wiring is changed to also serve as a capacitor. The layout of the first metal wiring 20 is changed so that the first metal wiring 20 is formed to cover the gate polysilicon 14a of the reset transistor.
    [54] By changing the layout of the first metal wiring in this way, a capacitor is formed at a portion where the gate polysilicon 14b and the first metal wiring 20 of the reset transistor overlap.
    [55] After forming the first metal wiring, as shown in FIG. 3E, an intermetallic insulating film 21 is formed on the first metal wiring, and a SOG (Spin On Glass) oxide film or the like is used as the insulating film between the metal wirings. Can be.
    [56] Subsequently, as shown in FIG. 3F, a second metal wiring 21 is formed on the intermetallic insulating film 21 to manufacture another capacitor.
    [57] The first metal wire 20, the insulating film 21 between the metal wires 21, and the second metal wire 22 also serve as capacitors. The second metal wires and the first metal wires serve as electrodes of the capacitors, and between the metal wires. The insulating film 21 serves as a dielectric, so that a capacitor is formed at a portion where the second metal wiring and the first metal wiring overlap.
    [58] Figure 4 is in this way the polysilicon, an interlayer insulating film according to a diagram showing a state in the process in three dimensions are formed from two metal wires, forming a capacitor which is connected to C FD and C FD and a series representing the capacitance of floating diffusion region, the first The metal wiring, the insulating film between the metal wirings, and the second metal wiring are shown.
    [59] Although not shown in FIG. 4, the gate polysilicon and the second metal wiring of the reset transistor are electrically connected to each other, and a circuit diagram of the gate polysilicon and the second metal wiring is shown on the basis of the three-dimensional shape shown in FIG. 4.
    [60] Referring to FIG. 5, two capacitors C 1 and C 2 are illustrated, which are capacitors each consisting of polysilicon, an interlayer insulating film, and a first metal wire, a first metal wire, an insulating film between metal wires, and a second metal wire. It shows the capacitor which was made.
    [61] In the capacitor C 1 illustrated in FIG. 5, the first metal wiring and the polysilicon serve as electrodes as described above, and in the capacitor C 2 , the first metal wiring and the second metal wiring serve as the electrodes as described above. . In addition, since the gate polysilicon and the second metal wiring of the reset transistor are electrically connected to each other, it can be seen that the electrical circuit diagram of the three-dimensional shape shown in FIG. 4 coincides with that shown in FIG.
    [62] When C 1 and C 2 connected in parallel are viewed as one capacitor, one capacitor is connected in series with the floating diffusion region, and as a result, the capacitance of the floating diffusion region is reduced.
    [63] When the capacitance of the floating diffusion area is reduced, even if the size of the photodiode decreases and the amount of electric charge transferred to the floating diffusion area is reduced, it is possible to manufacture an image sensor having the same performance without reducing the dynamic range.
    [64] In addition, in one embodiment of the present invention by forming a capacitor using the gate polysilicon of the first metal wiring, the second metal wiring and the reset transistor, by using the existing process as it is without the burden of additional process cost of the image sensor Increased dynamic range.
    [65] As described above, the present invention is not limited to the above-described embodiments and the accompanying drawings, and the present invention may be variously substituted, modified, and changed without departing from the spirit of the present invention. It will be apparent to those of ordinary skill in the art.
    [66] Chip size of CMOS image sensor is one of the most important factors in marketability. The present invention can secure a dynamic range even if the chip size is reduced, and the same performance can be guaranteed even if the area of the photodiode is reduced for the miniaturization of the CMOS image sensor, thereby securing the competitiveness of the product. .
    权利要求:
    Claims (3)
    [1" claim-type="Currently amended] A photodiode that senses light from the outside and generates photocharges;
    A floating diffusion region configured to receive and store charge generated from the photodiode;
    A capacitor connected in series with the floating diffusion region;
    A first transistor connected between the photodiode and the floating diffusion region to transfer charges generated from the photodiode to the floating diffusion region;
    A second transistor having one side connected to a power supply voltage and a gate connected to the capacitor to detect an electrical signal from the floating diffusion region; And
    A third transistor connected between a power supply voltage terminal and the capacitor to reset the photodiode;
    A fourth transistor having one side connected to the other side of the third transistor
    CMOS image sensor comprising a.
    [2" claim-type="Currently amended] The method of claim 1,
    The capacitor,
    And a gate polysilicon of the third transistor, and a first metal wiring and a second metal wiring.
    [3" claim-type="Currently amended] The method of claim 2,
    The capacitor is
    And a first capacitor including a gate polysilicon of the third transistor and a first metal wiring, and a second capacitor including the first metal wiring and the second metal wiring in parallel.
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    同族专利:
    公开号 | 公开日
    KR100477792B1|2005-03-22|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2002-04-27|Application filed by 주식회사 하이닉스반도체
    2002-04-27|Priority to KR20020023239A
    2003-11-01|Publication of KR20030084492A
    2005-03-22|Application granted
    2005-03-22|Publication of KR100477792B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR20020023239A|KR100477792B1|2002-04-27|2002-04-27|CMOS image sensor with wide dynamic range|
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